1. Field of the Invention
The present invention relates to data processing systems, and more particularly to multimedia data processing systems wherein graphics and video data are to be displayed simultaneously on a display monitor.
2. Prior Art
U.S. Pat. No. 4,490,741, entitled "Synchronization Signal Stabilization for Video Image Overlay", teaches a system for stabilizing the synchronization (sync) signal provided to a second video display generating a second video signal for precise overlay of a first video signal from a first video display having a relatively unstable sync signal.
Although the patent generally describes apparatus for synchronizing two video signals, it does not teach nor suggest overlaying of a video data stream and a graphics data image in a single shared frame buffer.
U.S. Pat. No. 4,961,097, entitled "Apparatus for Receipt and Display of Raster Scan Imagery Signals in Relocatable Windows on a Video Monitor", shows an interface and memory system which receives a digital raster scan image from an external source and displays the image as an inset window on a video monitor display. The input image is asynchronous with respect to the display refresh timing. The pipeline dual memory system is composed of update and display buffers.
Although the patent deals with overlaying two images on a single display monitor, the patent employs two separate buffers--an update buffer and a display buffer.
Although the patent generally describes apparatus for synchronizing two video signals, it does not teach nor suggest overlaying of a video data stream and a graphics data image in a single shared frame buffer.
U.S. Pat. No. 4,994,912, entitled "Audio Video Interactive Display", teaches a method and apparatus for synchronizing two independent rasters such that a standard T.V. video and a high resolution computer generated graphics video may be each displayed on a high resolution graphics monitor concurrently. This is accomplished by using dual frame buffers--a first T.V. frame buffer and a second graphics buffer.
Although the patent generally describes apparatus for synchronizing two video signals, it does not teach nor suggest overlaying of a video data stream and a graphics data image in a single shared frame buffer.
U.S. Pat. No. 5,227,863, entitled "Programmable Digital Video Processing System", teaches a programmable apparatus for digital processing of video signals from multiple sources converted to digital format to provide real time multiple simultaneous special video effects and suitable for direct interface to a conventional microcomputer bus. The patent also teaches means for synchronizing or "genlocking" signals from different sources for display on a single display monitor.
The patent describes a video processing subsystem that uses a synchronized pixel clock for genlocking. This technique produces a pointer artifact for a resizable, repositioned video window. This pointer artifact produced by the system according to the patent is eliminated by invention described herein.
U.S. Pat. No. 5,229,853, entitled "System for Converting a Video Signal From a First Format to a Second Format", teaches an apparatus for converting a video input signal representing an image from a first format to a prescribed second format.
The patent does not teach the merging of two separate multimedia images such as video and graphics and does not have the capability of readily handling relocatability of video windows.
Although the patent generally describes apparatus for synchronizing two video signals, it does not teach nor suggest overlaying of a video data stream and a graphics data image in a single shared frame buffer.
U.S. Pat. No. 5,347,322, entitled "Video Storage and Synchronization", teaches a video storage and synchronization system having one or more frame buffers and an output buffer providing a selectable delay. Incoming video signals are digitized and routed to the memories and/or to the buffer. Storage signals are read out from the memories in synchronism with the incoming signals and can be mixed with the incoming signals before processing in the output buffer.
The patent teaches how to synchronize a number of live video streams where the streams are always provided at a constant rate. The requirement for a constant rate is a severely limiting factor on the patent in that in many graphics display systems, update of graphics data is not always at a constant rate and cannot be handled by the system described in the patent.
Although the patent generally describes apparatus for synchronizing two video signals, it does not teach nor suggest overlaying of a video data stream and a graphics data image in a single shared frame buffer.